#36 Three input paths and finite transistor output resistance

Below are all the lines written in the notebook together with the full narration transcript.

1. 1. What loads your signal?

   

   Two questions: input loading at base and output response at collector

   Three input paths; another collector path from transistor r_o

   Narration transcript

   You connect a small signal to an amplifier. How much current must your source supply, and how large will the output be? Follow two separate views: look into the base to find the input resistance, then look into the collector to find the output resistance. Here the input node has three paths to signal ground. At the collector, the transistor itself adds another path. Think of parallel exits from a junction: adding an exit makes current flow easier. We will locate the exits before combining any resistors.

2. 2. Separate DC bias from the AC model

   

   R₁: supply→base; R₂: base→ground; emitter grounded, no R_E

   Established forward-active Q; practical AC input must preserve DC bias

   Narration transcript

   The original circuit uses two bias resistors. R one runs from the positive supply to the base, and R two runs from the base to ground. The collector connects through R C to the supply. The emitter is grounded: this source drawing has no emitter resistor and no drawn bypass capacitor. We analyze small changes around an already established forward active bias point. The input source symbol represents the signal, not a zero volt DC clamp that would destroy the bias. A practical zero-mean source needs suitable DC isolation.

3. 3. Separate DC bias from the AC model

   Constant supply → signal ground; both divider resistors end there

   Hybrid-π includes r_π, controlled current and r_o; transistor r_o ≠ port R_out

   Narration transcript

   For a constant supply, the small signal change is zero. That makes the supply node signal ground in the AC equivalent; it does not mean physically shorting the power supply. R one and R two now both connect the base to signal ground. The hybrid pi model adds r pi between base and emitter, a controlled collector current, and a finite lowercase r o between collector and emitter. Lowercase r o belongs to the transistor model. Capital R out describes the resistance seen at the complete output port. They are not automatically equal.

4. 4. One input node, three paths

   

   Shared two nodes, not drawing position: R₁, R₂ and r_π are parallel

   1/R_in=1/R₁+1/R₂+1/r_π; below smallest positive branch

   Narration transcript

   Look at the base node. Does R one become a series resistor just because it was drawn above R two? No. In the AC model, both remote ends are signal ground. R one, R two and r pi therefore share the same two nodes. All three are in parallel. The total input resistance is their parallel combination. It must be smaller than the smallest of the three finite positive resistances. That gives you a quick test before doing arithmetic.

5. 5. One input node, three paths

   

   $\displaystyle i_{\mathrm{in}}=i_{1}+i_{2}+i_{b}$

   Controlled collector current=βi_b, not βi_in

   Grounded emitter: v_π=v_in; no emitter drop to subtract

   Narration transcript

   Now follow the incoming current. One part flows through R one, another through R two, and only the third enters the transistor base. Kirchhoff's current law says the input current is the sum of these three branch currents. To obtain controlled collector current, multiply base current by beta, not total source current. Because the emitter is at signal ground, the voltage across r pi equals the input voltage. There is no emitter-resistor voltage to subtract in this topology.

6. 6. Follow the collector current

   

   Positive base change → controlled current ↑ → collector voltage ↓

   $\displaystyle \frac{v_{o}}{R_{C}}+\frac{v_{o}}{r_{o}}+g_{m} v_{\mathrm{in}}=0$

   A_stage=−g_m(R_C ∥ r_o); minus sign follows KCL

   Narration transcript

   At the collector, R C and lowercase r o both lead to signal ground. A positive base voltage increases the controlled current flowing downward from collector to emitter. The collector voltage must fall so the resistor branches can supply that current. Writing all collector currents as leaving the node gives output voltage over R C, plus output voltage over r o, plus g m times input voltage, equal to zero. Solve for output voltage: the gain is negative g m times the parallel combination of R C and r o. The minus sign follows from current balance, not a memorized decoration.

7. 7. Follow the collector current

   

   Remove external load; zero independent input → v_π=0

   R_out=R_C ∥ r_o, not r_o alone

   r_o → ∞: R_out → R_C; A_stage → −g_m R_C

   Narration transcript

   To measure output resistance, remove any external output load and set the independent input signal to zero. In this low frequency hybrid pi model there is no collector-to-base feedback path, so the base signal becomes zero and the controlled current becomes zero. A test source at the collector sees R C in parallel with r o. That is R out, not r o alone. As r o grows without bound, R out approaches R C and the stage gain approaches negative g m R C. This limit recovers the simpler ideal model.

8. 8. Build a numerical example

   Added example:

   $\displaystyle I_{\mathrm{CQ}}=1 \left[\mathrm{mA}\right]; \beta =100; V_{T}=25 \left[\mathrm{mV}\right]; R_{1}=30 k\Omega ; R_{2}=15 k\Omega ; R_{C}=1 k\Omega ; r_{o}=50 k\Omega$

   Q given; compute parameters, then input port, then output port

   Narration transcript

   Let's use a supplemental example; these numbers are not printed in the original lesson. The established collector bias current is one milliamp, beta is one hundred, and thermal voltage is twenty five millivolts. R one is thirty kilohms, R two fifteen kilohms, R C one kilohm, and transistor output resistance fifty kilohms. We are given the operating point rather than designing its bias here. First find g m and r pi, then combine the input resistors, then combine the output resistors. Keep those two ports separate.

9. 9. Build a numerical example

   g_m=1 [mA]/25 [mV]=0.04 S=40 mS

   $\displaystyle r_{\pi }=\frac{100}{0.04}=2500 \Omega =2.5 k\Omega$

   Narration transcript

   Transconductance, g m, tells us how much collector current changes for a small base-emitter voltage change. Divide one milliamp by twenty five millivolts. The milli factors cancel; one divided by twenty five is zero point zero four siemens, or forty millisiemens. Now divide beta, one hundred, by zero point zero four siemens. The result is two thousand five hundred ohms, or two point five kilohms. That is r pi. Its unit is resistance because dividing a dimensionless current gain by conductance gives ohms.

10. 10. Build a numerical example

    $\displaystyle R_{1} ∥ R_{2}=30\times \frac{15}{30+15}=10 k\Omega$

    $\displaystyle R_{\mathrm{in}}=10\times \frac{2.5}{10+2.5}=2 k\Omega$

    Total input 2 kΩ < 2.5 kΩ; parallel check passes

    Narration transcript

    Combine the two divider resistors first. Thirty times fifteen is four hundred fifty, and thirty plus fifteen is forty five. Four hundred fifty divided by forty five gives ten kilohms. Now place those ten kilohms in parallel with r pi, two point five kilohms. Their product is twenty five and their sum is twelve point five. Twenty five divided by twelve point five gives two kilohms. This is total input resistance. It is smaller than two point five kilohms, just as our parallel-path check predicted.

11. 11. Build a numerical example

    $\displaystyle R_{\mathrm{out}}=1\times 50/\left(1+50\right) k\Omega \approx 980.392 \Omega$

    Closer to 1 kΩ than 50 kΩ; larger branch does not dominate

    Narration transcript

    At the output, combine one kilohm with fifty kilohms. The product is fifty, and the sum is fifty one. Divide fifty by fifty one: the parallel resistance is about zero point nine eight zero three nine two kilohms. Multiply by one thousand to express it as about nine hundred eighty point three nine two ohms. This is R out. Notice how close it is to one kilohm, the smaller branch, and how far it is from fifty kilohms. The larger transistor resistance does not dominate a parallel combination.

12. 12. Build a numerical example

    

    $\displaystyle A_{\mathrm{stage}}=-0.04\times 980.392\approx -\frac{39.216 V}{V}$

    Infinite r_o gives −40; S×Ω dimensionless; watch milli conversion

    Narration transcript

    We have both port resistances. Now calculate stage gain. Multiply negative zero point zero four siemens by the unrounded output resistance in ohms. The result is about negative thirty nine point two one six volts per volt. If r o were infinite, the resistance would be one thousand ohms and the gain negative forty. Finite r o has reduced the magnitude slightly, not changed the inversion. Siemens times ohms is dimensionless, which is what a voltage ratio needs. Do not multiply forty millisiemens by an ohm value as though forty were siemens.

13. 13. Reconnect the signal source

    

    R_s=1 kΩ; input divider=2/(1+2)=2/3

    A_source≈−26.144 V/V; bias resistors load source through R_in

    Narration transcript

    Now add one kilohm of source resistance. The source sees total input resistance, two kilohms. Add one and two to get three, then divide two by three. About two thirds of the source signal reaches the base. Multiply stage gain by that fraction: source to output gain is about negative twenty six point one four four. This is a different gain measurement. The two bias resistors did not disappear from the circuit just because they were absent from the stage-gain formula. They load the source through R in.

14. 14. Reconnect the signal source

    

    $\displaystyle v_{s}=1 \left[\mathrm{mV}\right] \to v_{\mathrm{in}}\approx 0.667 \left[\mathrm{mV}\right]$

    $\displaystyle v_{o}\approx -26.144 \left[\mathrm{mV}\right]$

    Incremental changes; v_in≪25 [mV]; full DC collector voltage need not be negative

    Narration transcript

    Try a one millivolt source change. Two thirds times one millivolt gives about zero point six six seven millivolts at the base. Source gain times one millivolt gives about negative twenty six point one four four millivolts at the collector. These are incremental changes around the bias point, not the full node voltages. The base change is much smaller than the twenty five millivolt thermal voltage, supporting the small signal approximation. A negative output change means the collector voltage falls a little; it does not mean the collector's DC voltage must be negative.

15. 15. Reconnect the signal source

    Answer: input R₁ ∥ R₂ ∥ r_π; output R_C ∥ r_o

    Only i_b controls βi_b; source gain additionally includes input divider

    Shared nodes decide parallel reduction, not page position

    Narration transcript

    Keep one rule: identify the port, then identify every path to signal ground. At the input, R one, R two and r pi are parallel. At the output, R C and the transistor's r o are parallel. Only base current controls the beta-times-current source. Stage gain is negative g m times the output parallel resistance, while source gain also includes the input divider. The drawing may place resistors above or below each other; shared nodes, not page position, decide the reduction.

Source video: Electronics Basics #36 | Three Input Paths and Finite Transistor Output Resistance (9:54)