Electronics Basics #11 | Clamper Variations: 5 Worked Examples (All Bias Combinations)

Instructor: Dr. Süleyman Burak ÇELİK

Work through five clamper circuits side by side and see how the diode direction and DC bias polarity place the output anywhere on the y-axis — while the peak-to-peak voltage stays fixed at 2V_m. One skeleton (series capacitor, diode, load resistor), one rule: v_o(D ON) = ± V_DC ± V_d We solve all five cases (V_m = 10V, V_d = 0.7V silicon, V_DC = 3V): - Example 3 — Baseline, no bias: V_C = 9.3V, output [-0.7V, +19.3V] - Example 4 — D down, V_DC at cathode: V_C = 6.3V, output [-16.3V, +3.7V] - Example 5 — D up, V_DC at anode: V_C = 12.3V, output [+2.3V, +22.3V] (entirely positive) - Example 6 — D down, V_DC at ground: V_C = 12.3V, output [-22.3V, -2.3V] (entirely negative) - Example 7 — D up, V_DC at ground: V_C = 6.3V, output [-3.7V, +16.3V] Every case preserves a 20V peak-to-peak swing — the bias picks the address, the swing is fixed. Reference: Boylestad, Electronic Devices and Circuit Theory