Electronics Basics #24 | Common-Gate JFET — DC Bias and Saturation Check

Instructor: Dr. Süleyman Burak ÇELİK

Analyze the original common-gate DC circuit: 12 V, RD=1.5 kΩ, RS=680 Ω, directly grounded gate. The accepted ideal current is about3.835 mA; VGS≈−2.608 V and VDS≈3.639 V. Saturation passes with only about0.247 V of DC region margin. This is not an AC gain or maximum output-swing calculation. Ideal DC model: gate leakage neglected, saturation checked, adequate device ratings assumed. Internal calculations retain unrounded values. Real components have parameter tolerances. Chapters: 0:00 The goal: prepare a common-gate circuit 1:04 Read the grounded gate and source resistor 2:18 Form and solve the current equation 4:42 Reject the root outside the device domain 5:49 Find the node and terminal-pair voltages 7:32 Saturation passes, but with a small margin 9:14 Report a checked DC operating point