Electronics Basics #30 | Enhancement MOSFET: Voltage-Divider Bias

Instructor: Dr. Süleyman Burak ÇELİK

A gate voltage is not the same as a gate-to-source voltage. Starting with the complete circuit, find the unloaded divider voltage, determine the enhancement-MOSFET coefficient and solve the coupled current equation. Then reject the nonphysical root and verify saturation. Original lesson 45: 40 V supply, RD 3 kΩ, RS 0.82 kΩ, and a 22 MΩ / 18 MΩ gate divider. ID(on) = 3 mA at VGS(on) = 10 V; threshold = 5 V. The full coefficient is k = 0.12 mA/V². Checked result: VG = 18 V, IDQ ≈ 6.725 mA, VGSQ ≈ 12.486 V and VDS ≈ 14.312 V. Intermediate calculations retain precision; rounding the current early changes VDS by about 1 mV. The model assumes negligible gate leakage and no channel-length modulation. The 1 µA divider current makes leakage relevant in a real design; this is an idealized DC example, not a general recommendation for resistor values. Chapters: 0:00 The goal: find the operating point 1:04 Calibrate the enhancement device law 2:04 The divider sets the gate, not the source 3:17 Solve the current and reject the false root 6:01 Check the supply loop and saturation 7:42 Connect the circuit, device and operating point