Electronics Basics #23 | JFET Self-Bias — Step-by-Step DC Analysis

Instructor: Dr. Süleyman Burak ÇELİK

A grounded gate can have negative gate-source voltage because the source resistor raises the source. Solve the original 20 V, 3.3 kΩ / 1 kΩ circuit step by step, reject the invalid quadratic root, and check saturation. Ideal result: ID≈2.588 mA, VGS≈−2.588 V, VDS≈8.873 V. The source feedback opposes current changes without making an ideal constant-current source. Ideal DC model: gate leakage neglected, saturation checked, adequate device ratings assumed. Internal calculations retain unrounded values. Real components have parameter tolerances. Chapters: 0:00 The goal: bias without a second supply 0:55 Grounded gate, positive source, negative bias 2:40 Turn the feedback into one equation 5:30 Solve both roots; test their meaning 7:22 Recover every node voltage 8:58 Verify the region and the voltage sum 10:13 A self-consistent operating point